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CS8101
CS8101
Micropower 5V, 100mA Low Dropout Linear Regulator with RESET and ENABLE
Description
The CS8101 is a precision 5V micropower voltage regulator with very low quiescent current (70A typ at 100A load). The 5V output is accurate within 2% and supplies 100mA of load current with a typical dropout voltage of only 400mV. Microprocessor control logic includes an ENABLE input and an active RESET. This combination of low quiescent current, outstanding regulator performance and control logic makes the CS8101 ideal for any battery operated, microprocessor controlled equipment. The active RESET circuit includes hysteresis, and operates correctly at an output voltage as low as 1V. The RESET function is activated during the power up sequence or during normal operation if the output voltage drops outside the regulation limits by more than 200mV typ. The logic level compatible ENABLE input allows the user to put the regulator into a shutdown mode where it draws only 20A typical of quiescent current. The regulator is protected against reverse battery, short circuit, over voltage, and thermal overload conditions. The device can withstand load dump transients making it suitable for use in automotive environments. The CS8101 is functionally equivalent to the National Semiconductor LP2951 series low current regulators.
Features
s 5V 2% Output s Low 70A Quiescent Current s Active RESET s ENABLE Input for ON/OFF and Active/Sleep Mode Control
s 100mA Output Current Capability s Fault Protection +60V Peak Transient Voltage -15V Reverse Voltage Short Circuit Thermal Overload s Low Reverse Current (Output to Input)
Package Options
20L SOIC Wide
(Internally Fused Leads)
ENABLE
1
Block Diagram
VOUT NC VIN NC Gnd Gnd Gnd Gnd NC NC NC
VIN
Current Source (Circuit Bias) Over Voltage Shutdown
VOUT
NC NC Gnd Gnd Gnd
Internally connected on 5 lead TO-220
Gnd NC NC
ENABLE
Current Limit Sense
VOUTSense
RESET
5L TO-220
+
Thermal Protection
8L SOIC
VOUT 1 VOUTSense ENABLE Gnd VIN NC NC RESET
- Error
Amplifier
Tab (Gnd)
Bandgap Reference
RESET
+ Reset Comparator
Gnd
1. VOUT 2. ENABLE 3. Gnd 4. RESET 5. VIN
Other Packages: D2PAK (consult factory)
Cherry Semiconductor Corporation 2000 South County Trail, East Greenwich, RI 02818 Tel: (401)885-3600 Fax: (401)885-5786 Email: info@cherry-semi.com Web Site: www.cherry-semi.com
Rev. 4/9/99
1
A
Company
CS8101
Absolute Maximum Ratings Power Dissipation.............................................................................................................................................Internally Limited Transient Peak Voltage (46V Load Dump) ..................................................................................................................-15V, 60V Output Current .................................................................................................................................................Internally Limited ESD Susceptibility (Human Body Model) ..............................................................................................................................2kV Operating Temperature..........................................................................................................................................-40C to 125C Junction Temperature .............................................................................................................................................-40C to 150C Storage Temperature ................................................................................................................................................-55C to 150C Lead Temperature Soldering Wave Solder (through hole styles only) ..........................................10 sec. max, 260C peak Reflow (SMD styles only) ..........................................60 sec. max above 183C, 230C peak Electrical Characteristics: 6V VIN 26V, IOUT = 1mA, -40 TA 125, -40 TJ 150C unless otherwise specified.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
s Output Stage Output Voltage, VOUT Dropout Voltage (VIN-VOUT) Load Regulation Line Regulation Quiescent Current, (IQ) Active Mode 9V < VIN < 16V, 100A IOUT 100mA 6V VIN 26V, 100A IOUT 100mA IOUT = 100mA IOUT = 100A VIN = 14V, 100A IOUT 100mA 6V < V < 26V, IOUT = 1mA IOUT = 100A, VIN = 6V IOUT = 50mA IOUT 100mA VOUT = OFF, VIN = 6V, V ENABLE = 2V 7 VIN 17V, IOUT = 100mA, f = 120Hz VOUT = 0V VOUT 1V VOUT = 5V, VIN = 0V 60 105 25 150 30 4.90 4.85 5.00 5.00 400 100 5 5 70 4 12 20 75 200 125 180 34 100 38 200 5.10 5.15 600 150 50 50 140 6 20 50 V V mV mV mV mV A mA mA A dB mA mA C V A
Sleep Mode Ripple Rejection Current Limit Short Circuit Output Current Thermal Shutdown Overvoltage Shutdown Reverse Current s Enable Input ( ENABLE ) Threshold HIGH LOW Input Current s Reset Function ( RESET ) RESET Threshold HIGH (VRH) LOW (VRL) RESET Hysteresis Reset Output Leakage RESET = HIGH Output Voltage Low (VRLO) R RESET = 10K Low (VRpeak)
(VOUT OFF) (VOUT ON) V ENABLE = 2.4V
0.6
1.4 1.4 30
2.0 100
V V A
VOUT Increasing VOUT Decreasing (HIGH - LOW) VOUT VRH
4.525 4.500 25
4.75 4.700 50
VOUT - 0.05 VOUT - 0.075 100 25
V V mV A
1V VOUT VRL VOUT, Power up, Power down
0.1 0.6
0.4 1.0
V V
2
CS8101
Package Lead Description
PACKAGE LEAD # LEAD SYMBOL FUNCTION
8 Lead SOIC 8 1 3 4 5 2
20 Lead SOIC
(Internally Fused Leads)
19 20 1 4,5,6,7 14,15,16,17 10
5 Lead TO-220 5 1 2 3 4
VIN VOUT ENABLE Gnd RESET VOUTSense
Input voltage. 5V, 2%, 100mA output. Logic level switches output off when toggled HIGH. Ground. All Gnd leads must be connected to Ground. Active reset (accurate to VOUT 1V). Kelvin connection which allows remote sensing of output voltage for improved regulation. If remote sensing is not required, connect to VOUT. No Connection.
6,7
2,3,8,9,11,12,13,18
NC
Circuit Description Voltage Reference and Output Circuitry Output Stage Protection The output stage is protected against overvoltage, short circuit and thermal runaway conditions (Figure 1).
FOR 7V < VIN < 26V
VIN ENABLE
VINH
> 30V
VRH VRL
VIN VOUT
VOUT
(1) VR
PEAK
(2) VRLO (1) = NO RESET DELAY CAPACITOR (2) = WITH RESET DELAY CAPACITOR
VR
PEAK
RESET
IOUT
Load Dump
Current Limit
Short Circuit
Figure 2. Circuit Waveform
Figure 1. Typical Circuit Waveforms for Output Stage Protection.
If the input voltage rises above 30V (e.g. load dump), the output shuts down. This response protects the internal circuitry and enables the IC to survive unexpected voltage transients. Should the junction temperature of the power device exceed 180uC (typ) the load current capability is reduced thereby preventing thermal overload. This thermal management function is an effective means to prevent die overheating since the load current is the principle heat source in the IC. Regulator Control Functions The CS8101 contains two microprocessor compatible control functions: ENABLE and RESET (Figure 2).
ENABLE Function The ENABLE function switches the output transistor ON and OFF. When the voltage on the ENABLE lead exceeds 1.4V typ, the output pass transistor turns off, leaving a high impedance facing the load. The IC will remain in Sleep mode, drawing only 50A, until the voltage on this input drops below the ENABLE threshold. RESET Function A RESET signal (low voltage) is generated as the IC powers up until VOUT is within 250mV of the regulated output voltage, or when VOUT drops out of regulation,and is lower than 300mV below the regulated output voltage. A hysteresis of 50mV is included in the function to minimize oscillations. The RESET output is an open collector NPN transistor, controlled by a low voltage detection circuit. The circuit is functionally independent of the rest of the IC thereby guaranteeing that the RESET signal is valid for VOUT as low as 1V. 3
CS8101
Circuit Description: continued based applications. RC values can be chosen using the following formula:
VOUT COUT 5V to mP and System Power
RTOTCRST =
CS8101
RESET
RRST
[(
ln
tDelay VT VOUT VRST VOUT
)]
to mP RESET Port CRST
where:
RRST = RESET Delay resistor RIN = P port impedance RTOT = RRST in parallel with RIN CRST = RESET Delay capacitor
Figure 3. RC Network for RESET Delay
tDelay = desired delay time VRST = VSAT of RESET lead (0.7V @ turn - ON) VT = RESET threshold
An external RC network on the RESET lead (Figure 3) provides a sufficiently long delay for most microprocessor
Applications Notes
VBAT 0.1mF 500kW
VIN
VOUT
VCC
CS8101
ENABLE RESET
RRST
COUT
mP
Gnd
RESET CRST I/O Port
Q1 100kW 500kW 100kW
SWITCH
Figure 4. Microprocessor Control of CS8101 using external switching transistor Q1.
The circuit depicted in Figure 4 lets the microprocessor control its power source, the CS8101 regulator. An I/O port on the P and the SWITCH port are used to drive the base of Q1. When Q1 is driven into saturation, the voltage on the ENABLE lead falls below its lower threshold. The regulatorOs output is enabled. When the drive current is removed, the voltage on the ENABLE lead rises, the output is switched off and the IC moves into Sleep mode where it draws 50A (max).
By coupling these two controls with the ENABLE lead, the system has added flexibility. Once the system is running, the state of the SWITCH is irrelevant as long as the I/O port continues to drive Q1. The microprocessor can turn off its own power by withdrawing drive current, once the SWITCH is open. This software control at the I/O port allows the microprocessor to finish key housekeeping functions before power is removed. The logic options are summarized in Table 1.
4
CS8101
Application Notes: continued
Table 1. Logic Control of CS8101 Output Microprocessor I/O drive Switch ENABLE Output ON Closed LOW ON Open LOW ON OFF Closed LOW ON Open HIGH OFF
The I/O port of the microprocessor typically provides 50A to Q1. In automotive applications the SWITCH is connected to the ignition switch. Stability Considerations The output or compensation capacitor helps determine three main characteristics of a linear regulator: start-up delay, load transient response and loop stability.
VIN CIN* 0.1mF
VOUT RRST COUT** 10mF
CS8101
RESET ENABLE
*CIN required if regulator is located far from the power supply filter. ** COUT required for stability. Capacitor must operate at minimum temperature expected.
increase the load current slowly from zero to full load while observing the output for any oscillations. If no oscillations are observed, the capacitor is large enough to ensure a stable design under steady state conditions. Step 3: Increase the ESR of the capacitor from zero using the decade box and vary the load current until oscillations appear. Record the values of load current and ESR that cause the greatest oscillation. This represents the worst case load conditions for the regulator at low temperature. Step 4: Maintain the worst case load conditions set in step 3 and vary the input voltage until the oscillations increase. This point represents the worst case input voltage conditions. Step 5: If the capacitor is adequate, repeat steps 3 and 4 with the next smaller valued capacitor. A smaller capacitor will usually cost less and occupy less board space. If the output oscillates within the range of expected operating conditions, repeat steps 3 and 4 with the next larger standard capacitor value. Step 6: Test the load transient response by switching in various loads at several frequencies to simulate its real working environment. Vary the ESR to reduce ringing. Step 7: Remove the unit from the environmental chamber and heat the IC with a heat gun. Vary the load current as instructed in step 5 to test for any oscillations. Once the minimum capacitor value with the maximum ESR is found, a safety factor should be added to allow for the tolerance of the capacitor and any variations in regulator performance. Most good quality aluminum electrolytic capacitors have a tolerance of 20% so the minimum value found should be increased by at least 50% to allow for this tolerance plus the variation which will occur at low temperatures. The ESR of the capacitor should be less than 50% of the maximum allowable ESR found in step 3 above. Calculating Power Dissipation in a Single Output Linear Regulator The maximum power dissipation for a single output regulator (Figure 6) is: (1) PD(max) = {VIN(max) - VOUT(min)}IOUT(max) + VIN(max)IQ where: VIN(max) is the maximum input voltage, VOUT(min) is the minimum output voltage, IOUT(max) is the maximum output current for the application, and IQ is the quiescent current the regulator consumes at IOUT(max). Once the value of PD(max) is known, the maximum permissible value of RQJA can be calculated: RQJA = 150C - TA PD (2)
Figure 5. Test and application circuit showing output compensation.
The capacitor value and type should be based on cost, availability, size and temperature constraints. A tantalum or aluminum electrolytic capacitor is best, since a film or ceramic capacitor with almost zero ESR can cause instability. The aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures (-25C to -40C), both the value and ESR of the capacitor will vary considerably. The capacitor manufacturers data sheet usually provides this information. The value for the output capacitor COUT shown in Figure 5 should work for most applications, however it is not necessarily the optimized solution. To determine an acceptable value for COUT for a particular application, start with a tantalum capacitor of the recommended value and work towards a less expensive alternative part. Step 1: Place the completed circuit with a tantalum capacitor of the recommended value in an environmental chamber at the lowest specified operating temperature and monitor the outputs with an oscilloscope. A decade box connected in series with the capacitor will simulate the higher ESR of an aluminum capacitor. Leave the decade box outside the chamber, the small resistance added by the longer leads is negligible. Step 2: With the input voltage at its maximum value, 5
The value of RQJA can then be compared with those in the package section of the data sheet. Those packages with RQJA's less than the calculated value in equation 2 will keep the die temperature below 150C.
CS8101
Application Notes: continued In some cases, none of the packages will be sufficient to dissipate the heat generated by the IC, and an external heatsink will be required. Heatsinks A heatsink effectively increases the surface area of the package to improve the flow of heat away from the IC and into the surrounding air. Each material in the heat flow path between the IC and the outside environment will have a thermal resistance. Like series electrical resistances, these resistances are summed to determine the value of RQJA: RQJA = RQJC + RQCS + RQSA where:
IQ
IIN VIN
Smart Regulator
IOUT VOUT
}
Control Features
(3)
RQJC = the junctiontocase thermal resistance, RQCS = the casetoheatsink thermal resistance, and RQSA = the heatsinktoambient thermal resistance. RQJC appears in the package section of the data sheet. Like RQJA, it too is a function of package type. RQCS and RQSA are functions of the package type, heatsink and the interface between them. These values appear in heatsink data sheets of heatsink manufacturers.
Figure 6: Single output regulator with key performance parameters labeled.
6
CS8101
Package Specification
PACKAGE DIMENSIONS IN mm (INCHES) PACKAGE THERMAL DATA
D Lead Count 8L SOIC 20L SOIC Metric Max Min 5.00 4.80 13.00 12.60 English Max Min .197 .189 .512 .496 Thermal Data RQJC typ RQJA typ
8 Lead 20 Lead SOIC SOIC Wide 45 9 165 55
5 Lead TO-220 3.3 50
uC/W uC/W
Surface Mount Narrow Body (D); 150 mil wide
4.00 (.157) 3.80 (.150)
6.20 (.244) 5.80 (.228)
0.51 (.020) 0.33 (.013)
1.27 (.050) BSC
1.75 (.069) MAX 1.57 (.062) 1.37 (.054) 1.27 (.050) 0.40 (.016) 0.25 (.010) 0.19 (.008) D REF: JEDEC MS-012
0.25 (0.10) 0.10 (.004)
Surface Mount Wide Body (DW); 300 mil wide
7.60 (.299) 7.40 (.291)
10.65 (.419) 10.00 (.394)
0.51 (.020) 0.33 (.013)
1.27 (.050) BSC
2.49 (.098) 2.24 (.088)
2.65 (.104) 2.35 (.093)
1.27 (.050) 0.40 (.016)
REF: JEDEC MS-013
0.32 (.013) 0.23 (.009) D 0.30 (.012) 0.10 (.004)
7
CS8101
Package Specification
5 Lead TO-220 (T) Straight 5 Lead TO-220 (THA) Horizontal
4.83 (.190) 10.54 (.415) 9.78 (.385) 1.40 (.055) 3.96 (.156) 3.71 (.146) 1.14 (.045) 4.06 (.160)
10.54 (.415) 9.78 (.385) 2.87 (.113) 6.55 (.258) 2.62 (.103) 5.94 (.234)
4.83 (.190) 4.06 (.160) 3.96 (.156) 3.71 (.146)
1.40 (.055) 1.14 (.045)
2.87 (.113) 2.62 (.103)
6.55 (.258) 5.94 (.234)
14.99 (.590) 14.22 (.560)
14.99 (.590) 14.22 (.560)
2.77 (.109) 6.83 (.269)
14.22 (.560) 13.72 (.540)
0.81(.032)
1.68 (.066) TYP 1.70 (.067) 6.81(.268)
0.56 (.022) 0.36 (.014) 6.60 (.260) 5.84 (.230)
2.92 (.115) 2.29 (.090)
1.02 (.040) 0.76 (.030)
1.02(.040) 0.63(.025) 6.93(.273) 6.68(.263)
1.83(.072) 1.57(.062)
0.56 (.022) 0.36 (.014) 2.92 (.115) 2.29 (.090)
5 Lead TO-220 (TVA) Vertical
4.83 (.190) 4.06 (.160) 10.54 (.415) 9.78 (.385) 3.96 (.156) 3.71 (.146)
1.40 (.055) 1.14 (.045)
6.55 (.258) 5.94 (.234) 2.87 (.113) 2.62 (.103) 14.99 (.590) 14.22 (.560)
1.78 (.070) 2.92 (.115) 2.29 (.090) 8.64 (.340) 7.87 (.310) 0.56 (.022) 0.36 (.014)
4.34 (.171) 7.51 (.296) 1.68 (.066) typ 6.80 (.268)
1.70 (.067)
.94 (.037) .69 (.027)
Ordering Information
Part Number CS8101YD8 CS8101YDR8 CS8101YDWF20 CS8101YDWFR20 CS8101YT5 CS8101YTVA5 CS8101YTHA5
Rev. 4/9/99
Description 8L SOIC 8L SOIC (tape & reel) 20L SOIC (internally fused leads) 20L SOIC (internally fused leads) (tape & reel) 5L TO-220 5L TO-220 Vertical 5L TO-220 Horizontal 8
Cherry Semiconductor Corporation reserves the right to make changes to the specifications without notice. Please contact Cherry Semiconductor Corporation for the latest available information.
(c) 1999 Cherry Semiconductor Corporation

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